arch-arm: Fix TarmacParser handling of 64bit LD/ST
authorGiacomo Travaglini <giacomo.travaglini@arm.com>
Thu, 3 Oct 2019 14:04:34 +0000 (15:04 +0100)
committerGiacomo Travaglini <giacomo.travaglini@arm.com>
Mon, 11 Nov 2019 16:56:35 +0000 (16:56 +0000)
commite0ed3d744ded814bd2ce207056384694853634af
tree8ed728f719ec9e98d60e27892a6ce60971d82389
parent239835d4246cc5e2c13892c19a4b79e0cc034393
arch-arm: Fix TarmacParser handling of 64bit LD/ST

The TarmacParser was assuming 32 bit accesses only.
This was creating a mismatch when parsing a trace with 64 bit
accesses.

E.g.

In

clk IT (18) 002001f4 f8008441 O EL3h_s : STR      x1,[x2],#8
clk MW8 00201008:000000201008 00000000_40000401

Only the 32 MSBs were checked (00000000)

Change-Id: I51e803b53efe953edcd9378f6c9481c04932331e
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21562
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
src/arch/arm/tracers/tarmac_parser.cc