intel/fs/gen12: Workaround data coherency issues due to broken NoMask control flow.
authorFrancisco Jerez <currojerez@riseup.net>
Fri, 24 Jan 2020 23:09:52 +0000 (15:09 -0800)
committerFrancisco Jerez <currojerez@riseup.net>
Fri, 14 Feb 2020 22:31:48 +0000 (14:31 -0800)
commite14529ff3262a527d630cecac655f69c8ae15c3f
tree8e4e6e6bbc6bdd0b18d47856824dc5b5da861fff
parent4e4e8d793f050eac84f2a850ab2e5c24c4c459ac
intel/fs/gen12: Workaround data coherency issues due to broken NoMask control flow.

Together with the fixup_nomask_control_flow() pass introduced in a
previous patch, this implements a less invasive alternative to the
workaround documented in the hardware spec for GEN:BUG:1407528679,
which doesn't involve disabling structured control flow.

Under some conditions Gen12 hardware can end up executing a BB with
all channels disabled, which will lead to the execution of any NoMask
instructions in it, even though any execution-masked instructions will
be correctly shot down.  This could break assumptions of the SWSB pass
if the data computed by a NoMask instruction is synchronized against
by using an SWSB annotation baked into a regular execution-masked
instruction, since the first (NoMask) instruction may be executed
redundantly by the hardware, even though the second will correctly be
shot down, potentially leading to a RaW or WaW hazard if a third
instruction subsequently accesses the destination register of the
first instruction.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Cc: 20.0 <mesa-stable@lists.freedesktop.org>
src/intel/compiler/brw_fs_scoreboard.cpp