dev,arm: add Kvm mode of operation for CP15 timer
authorCurtis Dunham <Curtis.Dunham@arm.com>
Mon, 22 May 2017 19:22:14 +0000 (19:22 +0000)
committerAndreas Sandberg <andreas.sandberg@arm.com>
Wed, 5 Jul 2017 14:24:03 +0000 (14:24 +0000)
commite1c8c1f8603672823c89e5ed4c98502350c600d6
tree8d8c921888ab7eaaeb9a14be6e0ec51445689854
parente2a049e089b4878d6abd8e816973b175e2be2d7c
dev,arm: add Kvm mode of operation for CP15 timer

The timer device exposed via the ARM ISA, also known as the
"CP15 timer" due to its legacy coprocessor encodings, is
implemented by the GenericTimerISA class.  During Kvm
execution, however, this functionality is directly emulated
by the hardware.

This commit subclasses the GenericTimer, which is (solely)
used by GenericTimerISA, to facilitate Kvm in much the same
way as the prior GIC changes: the gem5 model is used as the
backing store for state, so checkpointing and CPU switching
work correctly, but isn't used during Kvm execution.

The added indirection prevents the timer device from creating
events when we're just updating its state, but not actually
using it for simulation.

Change-Id: I427540d11ccf049c334afe318f575146aa888672
Reviewed-on: https://gem5-review.googlesource.com/3542
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
src/dev/arm/generic_timer.cc
src/dev/arm/generic_timer.hh