i965/fs: Allow spilling for SIMD16 compute shaders
authorJordan Justen <jordan.l.justen@intel.com>
Mon, 22 Feb 2016 04:55:09 +0000 (20:55 -0800)
committerJordan Justen <jordan.l.justen@intel.com>
Tue, 8 Mar 2016 22:27:18 +0000 (14:27 -0800)
commite1d54b1ba5a9d579020fab058bb065866bc35554
treee5088162e061f0b92983751d25d3031622118a36
parent91630d7453ce39680366b15428b5ab238ae50026
i965/fs: Allow spilling for SIMD16 compute shaders

For fragment shaders, we can always use a SIMD8 program. Therefore, if
we detect spilling with a SIMD16 program, then it is better to skip
generating a SIMD16 program to only rely on a SIMD8 program.

Unfortunately, this doesn't work for compute shaders. For a compute
shader, we may be required to use SIMD16 if the local workgroup size
is bigger than a certain size. For example, on gen7, if the local
workgroup size is larger than 512, then a SIMD16 program is required.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93840
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: "11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
src/mesa/drivers/dri/i965/brw_fs.cpp
src/mesa/drivers/dri/i965/brw_fs.h
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp