iris: Implement buffer-local memory barrier based on cache coherency matrix.
authorFrancisco Jerez <currojerez@riseup.net>
Thu, 6 Feb 2020 02:59:46 +0000 (18:59 -0800)
committerMarge Bot <eric+marge@anholt.net>
Wed, 3 Jun 2020 23:12:22 +0000 (23:12 +0000)
commite22659089837aacf6c97544fcc4c9acdda516297
treec38f38858a0f6b23b4fac444fdd722211d5014d4
parent8a6349eb866952fe7fbf7834f24bcda3df807a4b
iris: Implement buffer-local memory barrier based on cache coherency matrix.

This takes advantage of the previously introduced cache tracking
infrastructure in order to define a multi-purpose barrier operation
that allows the caller to order memory operations with respect to
previous operations performed on the same buffer from any other cache
domain.

v2: Assorted CPU overhead micro-optimizations (Francisco).
v3: Use C99 designated initializers (Ken).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3875>
src/gallium/drivers/iris/iris_context.h
src/gallium/drivers/iris/iris_pipe_control.c