arch-riscv: Make use of ImmOp's polymorphism
authorAlec Roelke <ar4jc@virginia.edu>
Sat, 2 Dec 2017 17:58:14 +0000 (12:58 -0500)
committerAlec Roelke <ar4jc@virginia.edu>
Wed, 10 Jan 2018 16:07:02 +0000 (16:07 +0000)
commite22894353869092c9da4977ec9ef74afa94cf57a
treeb0a3df8042d1939818e54a7a473af8eed0364710
parent78524bda5606e1b60615f57ebd6bfe5bcdd71afb
arch-riscv: Make use of ImmOp's polymorphism

This patch makes use of ImmOp's polymorphism to remove unnecessary
casting from the implementations of arithmetic instructions with
immediate operands and to remove the CUIOp format by combining it with
the CIOp format (compressed arithmetic instructions with immediate
operands). Interestingly, RISC-V specifies that instructions with
unsigned immediate operands still need to sign-extend the immediates
from 12 (or 20) bits to 64 bits, so that is left alone.

Change-Id: If20d70c1e90f379b9ed8a4155b2b9222b6defe16
Reviewed-on: https://gem5-review.googlesource.com/6401
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Tuan Ta <qtt2@cornell.edu>
Maintainer: Alec Roelke <ar4jc@virginia.edu>
src/arch/riscv/isa/decoder.isa
src/arch/riscv/isa/formats/compressed.isa
src/arch/riscv/isa/formats/standard.isa
tests/test-progs/insttest/bin/riscv/linux-rv64i/insttest
tests/test-progs/insttest/src/riscv/rv64i.cpp