Several instructions disassemble a zero immediate as wzr/xzr due to using a register...

Several instructions disassemble a zero immediate as wzr/xzr due to using a register operand in the disassembly.

Several instructions disassemble a zero immediate as wzr/xzr due to
using a register operand in the disassembly.  Avoid this by removing
the register operand.

2016-01-28  Wilco Dijkstra  <wdijkstr@arm.com>

	* config/aarch64/aarch64.md (ccmp<mode>): Disassemble
	immediate as %1.
	(add<mode>3_compare0): Likewise.
	(addsi3_compare0_uxtw): Likewise.
	(add<mode>3nr_compare0): Likewise.
	(compare_neg<mode>): Likewise.
	(<optab><mode>3): Likewise.

From-SVN: r232921