arch-power: Added support for Atomic Instructions
authorKajoljain379 <kajoljain797@gmail.com>
Wed, 10 Apr 2019 05:46:01 +0000 (05:46 +0000)
committerKajol Jain <kajoljain797@gmail.com>
Wed, 12 Jun 2019 08:36:05 +0000 (14:06 +0530)
commite5d027df6c753fd2c891235d5b25bb89b155eb65
tree39d7e5102ede95a2c2c199350c98a28c04c02050
parent291099855223688fd3e179c4c3ea13e95d6c521f
arch-power: Added support for Atomic Instructions

Add support for Load and Reserve and Store Conditional Instructions:

* Load Byte And Reserve Indexed.
* Store Byte Conditional Indexed.
* Load Halfword And Reserve Indexed.
* Store Halfword Conditional Indexed.
* Load Word And Reserve Indexed.
* Store Word Conditional Indexed.
* Load Doubleword And Reserve Indexed.
* Store Doubleword Conditional Indexed.

Change-Id: I1dac94928e7a1bb6f458a4ecea0fca3247b26d37
Signed-off-by: Kajoljain379 <kajoljain797@gmail.com>
src/arch/power/isa/decoder.isa
src/arch/power/isa/formats/util.isa
src/arch/power/locked_mem.hh