i965: limit VF caching workaround to gen8/9/10
authorLionel Landwerlin <lionel.g.landwerlin@intel.com>
Thu, 3 Jan 2019 16:13:14 +0000 (16:13 +0000)
committerLionel Landwerlin <lionel.g.landwerlin@intel.com>
Fri, 4 Jan 2019 11:18:48 +0000 (11:18 +0000)
commite5ed217545198088673440f5e2e5ee435d8072fd
tree164fc94f26c1c86cd950e6c559624b7e8783407b
parentf0312cfa93344a0fdaf008c808d9efc21ced9d9c
i965: limit VF caching workaround to gen8/9/10

Documentation of the 3DSTATE_VERTEX_BUFFERS packet says this is only
needed before ICL.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
src/mesa/drivers/dri/i965/genX_blorp_exec.c
src/mesa/drivers/dri/i965/genX_state_upload.c