projects / yosys.git / commit
| author | Eddie Hung <eddie@fpgeh.com> | |
| Fri, 23 Aug 2019 18:31:20 +0000 (11:31 -0700) | ||
| committer | Eddie Hung <eddie@fpgeh.com> | |
| Fri, 23 Aug 2019 18:31:20 +0000 (11:31 -0700) | ||
| commit | e658d472c89d0fef820f2a9ddc6184b566cc0d9b | |
| tree | da7f4c319acd0c0a08f8064feee07595da8e0c5d | tree |
| parent | d672b1ddecf30cc7fd005ce7a06ab6c2d3dca1a5 | commit | diff |
| techlibs/xilinx/cells_sim.v | diff | blob | history | |
| techlibs/xilinx/xc7_brams_bb.v | diff | blob | history |