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(parent: d919930) | patch
ARM: Add two unimplemented miscellaneous registers.
authorWade Walker <wade.walker@arm.com>
Fri, 15 Jul 2011 16:53:34 +0000 (11:53 -0500)
committerWade Walker <wade.walker@arm.com>
Fri, 15 Jul 2011 16:53:34 +0000 (11:53 -0500)
commite6672d1f291e415c6d7e0453dabe8c8b7eb5ddc1
tree2195fa893b9bcdcfe13db3e16d2f140b84e33d61tree
parentd919930c3c7f5d364f211513742a51f56e36eaabcommit | diff
ARM: Add two unimplemented miscellaneous registers.

Adds MISCREG_ID_MMFR2 and removes break on access to MISCREG_CLIDR. Both
registers now return values that are consistent with current ARM
implementations.
src/arch/arm/isa.cc diff | blob | history
src/arch/arm/miscregs.hh diff | blob | history