nvptx: Add support for vadd.add and vsub.add instructions.
The following patch adds support for three-input addition instructions to
the nvptx backend. The PTX ISA's "vadd.u32.u32.u32.add d, a, b, c"
instruction effectively implements 32-bit d = a+b+c, and the
"vsub.u32.u32.u32 d,a,b,c" instruction that provides 32-bit d = (a-b)+c.
The hope is that these mnemonics help ptxas generate the low-level
hardware's IADD3 instruction.
2020-07-06 Roger Sayle <roger@nextmovesoftware.com>
gcc/ChangeLog:
* config/nvptx/nvptx.md (*vadd_addsi4): New instruction.
(*vsub_addsi4): New instruction.
gcc/testsuite/ChangeLog:
* gcc.target/nvptx/vadd_add.c: New test.
* gcc.target/nvptx/vsub_add.c: New test.