Reimplement ravenscar registers using tables
authorTom Tromey <tromey@adacore.com>
Tue, 3 May 2022 14:18:14 +0000 (08:18 -0600)
committerTom Tromey <tromey@adacore.com>
Tue, 14 Jun 2022 15:08:29 +0000 (09:08 -0600)
commite73434e38f55e21cc33457ce3b218fa7b4592fec
treee3e443b6bbd889dc8cc9ff321a946a09052dbdd4
parent2808125fbb5f9c55f52e863283b7f1c5f0ef1a65
Reimplement ravenscar registers using tables

Currently, the ravenscar-thread implementation for each architecture
is written by hand.  However, these are actually written by
copy-paste.  It seems better to switch to a table-driven approach.

The previous code also fetched all registers whenever any register was
requested.  This is corrected in the new implementation.
gdb/aarch64-ravenscar-thread.c
gdb/amd64-ravenscar-thread.c
gdb/ppc-ravenscar-thread.c
gdb/ravenscar-thread.c
gdb/ravenscar-thread.h
gdb/riscv-ravenscar-thread.c
gdb/sparc-ravenscar-thread.c