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(parent: af5706c) | patch
Reverse bits in INIT parameter for Xilinx, since MSB is shifted first
authorEddie Hung <eddieh@ece.ubc.ca>
Thu, 14 Mar 2019 16:38:42 +0000 (09:38 -0700)
committerEddie Hung <eddieh@ece.ubc.ca>
Thu, 14 Mar 2019 16:38:42 +0000 (09:38 -0700)
commite7ef7fa443c0b7c7ec9e4bbb15893053aed8c3ce
tree95ba99bf3ce2cab5951e5bebf211249252fbf859tree
parentaf5706c2a38c010e6c7343aeb1c5d6e26a6b7799commit | diff
Reverse bits in INIT parameter for Xilinx, since MSB is shifted first
techlibs/xilinx/cells_map.v diff | blob | history