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(parent: 477ea60) | patch
i965: Move gen8_disable_stages to brw_upload_initial_gpu_state
authorNanley Chery <nanley.g.chery@intel.com>
Fri, 30 Sep 2016 23:28:53 +0000 (16:28 -0700)
committerNanley Chery <nanley.g.chery@intel.com>
Mon, 31 Oct 2016 20:20:05 +0000 (13:20 -0700)
commite9a25e024757c8daa0da86d064afd446824160dc
tree01c606356cd65828a953a01fc599ae83df1e345btree
parent477ea60b68d3e9a16d1f4947f95e3e7ce20e6f67commit | diff
i965: Move gen8_disable_stages to brw_upload_initial_gpu_state

3DSTATE_WM_CHROMAKEY isn't programmed anywhere else.
3DSTATE_WM_HZ_OP is programmed, then cleared by blorp during a
HZ op, so repeatedly clearing it after every blorp execution is
redundant.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
src/mesa/drivers/dri/i965/Makefile.sources diff | blob | history
src/mesa/drivers/dri/i965/brw_state.h diff | blob | history
src/mesa/drivers/dri/i965/brw_state_upload.c diff | blob | history
src/mesa/drivers/dri/i965/gen8_disable.c [deleted file] blob | history