x86: Implement the RDTSCP instruction.
authorGabe Black <gabeblack@google.com>
Tue, 13 Mar 2018 00:41:15 +0000 (17:41 -0700)
committerGabe Black <gabeblack@google.com>
Wed, 14 Mar 2018 20:07:38 +0000 (20:07 +0000)
commitea383880c61023360aee672c6197f2cda9889f07
tree21cbf187cf42a5b802fb03dec7ac946acc6d69d6
parent8a71c570226d06d6a179700c114de91d2c177be0
x86: Implement the RDTSCP instruction.

This is very similar to RDTSC, except that it requires all younger
instructions to retire before it completes, and it writes the TSC_AUX
MSR into ECX. I've added an mfence as an iniitial microop to ensure
that memory accesses complete before RDTSCP runs, and added an rdval
microop at the end to read the TSC_AUX value into ECX.

Change-Id: I9766af562b7fd0c22e331b56e06e8818a9e268c9
Reviewed-on: https://gem5-review.googlesource.com/9043
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>
src/arch/x86/isa/decoder/two_byte_opcodes.isa
src/arch/x86/isa/insts/system/msrs.py