riscv: remove NonSpeculative flag from fence inst
authorTuan Ta <qtt2@cornell.edu>
Mon, 2 Apr 2018 19:19:51 +0000 (15:19 -0400)
committerTuan Ta <qtt2@cornell.edu>
Wed, 6 Feb 2019 21:20:00 +0000 (21:20 +0000)
commitea487f9bb7b35556a39ef25765859330e62b11ae
treee9239dd3a82da6bc2d30dc02de20d5d94b5dc1a7
parent02dafc5498750d9734ba8f2a1608a846f90b71d1
riscv: remove NonSpeculative flag from fence inst

Fence instruction origially had two flags NonSpeculative and
MemBarrier. In O3 model, MemBarrier instructions are inserted
into the instruction queue by the InstructionQueue::insertBarrier (at
src/cpu/o3/iew_impl.hh:1083). Barrier instructions are implicitly
assumed to be non-speculative.

Adding NonSpeculative flag to fence instruction makes it inserted into
the instruction queue twice (at src/cpu/o3/iew_impl.hh:1083 and :1111).
This can lead to a deadlock if both pointers to the instruction are not
cleared from the queue when the instruction retires.

This patch removes NonSpeculative flag from the fence inst.

Change-Id: I26573d12a0b52f43b73c0e51158286dc98d05ea4
Reviewed-on: https://gem5-review.googlesource.com/c/8183
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Alec Roelke <ar4jc@virginia.edu>
Maintainer: Alec Roelke <ar4jc@virginia.edu>
src/arch/riscv/isa/decoder.isa