git.libre-soc.org Git - riscv-isa-sim.git/commit

author	Andrew Waterman <waterman@cs.berkeley.edu>
	Fri, 13 Mar 2015 00:32:43 +0000 (17:32 -0700)
committer	Andrew Waterman <waterman@cs.berkeley.edu>
	Fri, 13 Mar 2015 00:32:43 +0000 (17:32 -0700)
commit	ea58df801f36605b462783a61b5266bdd9a40eb0
tree	ec6c4736f29e9f2021a9e448946e0a0169639cc1	tree
parent	9af855a28e7dc4009ad31312840ca6f9396d572e	commit \| diff

Update to new privileged spec

Sorry, everyone.

74 files changed:

hwacha/decode_hwacha.h		diff \| blob \| history
hwacha/hwacha.cc		diff \| blob \| history
hwacha/insns_ut/ut_fcvt_h_l.h		diff \| blob \| history
hwacha/insns_ut/ut_fcvt_h_lu.h		diff \| blob \| history
hwacha/insns_ut/ut_fcvt_l_h.h		diff \| blob \| history
hwacha/insns_ut/ut_fcvt_lu_h.h		diff \| blob \| history
riscv/decode.h		diff \| blob \| history
riscv/encoding.h		diff \| blob \| history
riscv/extension.cc		diff \| blob \| history
riscv/htif.cc		diff \| blob \| history
riscv/insns/addiw.h		diff \| blob \| history
riscv/insns/addw.h		diff \| blob \| history
riscv/insns/amoadd_d.h		diff \| blob \| history
riscv/insns/amoand_d.h		diff \| blob \| history
riscv/insns/amomax_d.h		diff \| blob \| history
riscv/insns/amomaxu_d.h		diff \| blob \| history
riscv/insns/amomin_d.h		diff \| blob \| history
riscv/insns/amominu_d.h		diff \| blob \| history
riscv/insns/amoor_d.h		diff \| blob \| history
riscv/insns/amoswap_d.h		diff \| blob \| history
riscv/insns/amoxor_d.h		diff \| blob \| history
riscv/insns/csrrc.h		diff \| blob \| history
riscv/insns/csrrci.h		diff \| blob \| history
riscv/insns/csrrs.h		diff \| blob \| history
riscv/insns/csrrsi.h		diff \| blob \| history
riscv/insns/csrrw.h		diff \| blob \| history
riscv/insns/csrrwi.h		diff \| blob \| history
riscv/insns/divuw.h		diff \| blob \| history
riscv/insns/divw.h		diff \| blob \| history
riscv/insns/fcvt_d_l.h		diff \| blob \| history
riscv/insns/fcvt_d_lu.h		diff \| blob \| history
riscv/insns/fcvt_l_d.h		diff \| blob \| history
riscv/insns/fcvt_l_s.h		diff \| blob \| history
riscv/insns/fcvt_lu_d.h		diff \| blob \| history
riscv/insns/fcvt_lu_s.h		diff \| blob \| history
riscv/insns/fcvt_s_l.h		diff \| blob \| history
riscv/insns/fcvt_s_lu.h		diff \| blob \| history
riscv/insns/fmv_d_x.h		diff \| blob \| history
riscv/insns/fmv_x_d.h		diff \| blob \| history
riscv/insns/ld.h		diff \| blob \| history
riscv/insns/lr_d.h		diff \| blob \| history
riscv/insns/lwu.h		diff \| blob \| history
riscv/insns/mcall.h	[new file with mode: 0644]	blob
riscv/insns/mret.h	[new file with mode: 0644]	blob
riscv/insns/mrts.h	[new file with mode: 0644]	blob
riscv/insns/mulh.h		diff \| blob \| history
riscv/insns/mulhsu.h		diff \| blob \| history
riscv/insns/mulhu.h		diff \| blob \| history
riscv/insns/mulw.h		diff \| blob \| history
riscv/insns/remuw.h		diff \| blob \| history
riscv/insns/remw.h		diff \| blob \| history
riscv/insns/sc_d.h		diff \| blob \| history
riscv/insns/scall.h		diff \| blob \| history
riscv/insns/sd.h		diff \| blob \| history
riscv/insns/sfence_vm.h	[new file with mode: 0644]	blob
riscv/insns/slli.h		diff \| blob \| history
riscv/insns/slliw.h		diff \| blob \| history
riscv/insns/sllw.h		diff \| blob \| history
riscv/insns/srai.h		diff \| blob \| history
riscv/insns/sraiw.h		diff \| blob \| history
riscv/insns/sraw.h		diff \| blob \| history
riscv/insns/sret.h		diff \| blob \| history
riscv/insns/srl.h		diff \| blob \| history
riscv/insns/srli.h		diff \| blob \| history
riscv/insns/srliw.h		diff \| blob \| history
riscv/insns/srlw.h		diff \| blob \| history
riscv/insns/subw.h		diff \| blob \| history
riscv/interactive.cc		diff \| blob \| history
riscv/mmu.cc		diff \| blob \| history
riscv/processor.cc		diff \| blob \| history
riscv/processor.h		diff \| blob \| history
riscv/rocc.cc		diff \| blob \| history
riscv/trap.cc		diff \| blob \| history
riscv/trap.h		diff \| blob \| history

Simple-V augmented version of spike

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