dev-arm: Rewrite ICC_BPR0/ICC_BPR1 handling
authorGiacomo Travaglini <giacomo.travaglini@arm.com>
Tue, 20 Aug 2019 10:24:40 +0000 (11:24 +0100)
committerGiacomo Travaglini <giacomo.travaglini@arm.com>
Fri, 6 Sep 2019 11:53:49 +0000 (11:53 +0000)
commitead1e7a2a36a1d5fd1c612554590c99a05a98ce4
tree387cacbdff712f8c2e7e375ab2bbdc60407cc372
parent51022bfe0eeaef5f08d6ace98ebfb1917d1b3331
dev-arm: Rewrite ICC_BPR0/ICC_BPR1 handling

The patch is fixing BPR reads in AA32, by removing the line

Gicv3::GroupId group =
    misc_reg == MISCREG_ICC_BPR0_EL1 ? Gicv3::G0S : Gicv3::G1S;

Where a read to ICC_BPR0 will return a G1S group.
The patch is also fixing Security banking accesses.

Change-Id: I28f1d1244c44d4b8b202d3141f8380943c7c1c86
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20620
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
src/dev/arm/gic_v3_cpu_interface.cc
src/dev/arm/gic_v3_cpu_interface.hh