arch,cpu: Make the CPU's ISA parameter type BaseISA.
authorGabe Black <gabeblack@google.com>
Tue, 4 Feb 2020 01:08:18 +0000 (17:08 -0800)
committerGabe Black <gabeblack@google.com>
Thu, 13 Feb 2020 19:36:54 +0000 (19:36 +0000)
commiteae03bbc9d865e42cfdaa7ba63efa832ed233205
tree2d7039e8e3ef6eea494b3758ffb532f8d8b318ae
parentd1e2f182302003ddda3336f20f85db6fa3ecfcd8
arch,cpu: Make the CPU's ISA parameter type BaseISA.

This is mostly only a superficial change since the isa parameter is
then dynamic cast to the ISA specific version inside the various
consumers, currently the SimpleThread, O3CPU and Decoder classes. If
those aren't being used, for instance in the fast model CPUs, then you
can use a different ISA implementation without any type clashes.

Change-Id: I2226ef60f9a471ae51b8bfce8683033f7854197a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25009
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
src/cpu/BaseCPU.py
src/cpu/o3/cpu.cc
src/cpu/o3/fetch_impl.hh
src/cpu/simple_thread.cc
src/cpu/simple_thread.hh