projects / litex.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: f0b0942) | patch
bus/csr/SRAM: better handling of writes to memories larger than the CSR width
authorSebastien Bourdeauducq <sebastien@milkymist.org>
Thu, 30 May 2013 16:45:04 +0000 (18:45 +0200)
committerSebastien Bourdeauducq <sebastien@milkymist.org>
Thu, 30 May 2013 16:45:04 +0000 (18:45 +0200)
commitebbd5ebcd213c7b8e4640d5e1fbe413273724b09
tree47154848121c31f3bfc144167fb40a2143e11c2etree
parentf0b094205540c960a3b418049604b99a46841524commit | diff
bus/csr/SRAM: better handling of writes to memories larger than the CSR width
migen/bus/csr.py diff | blob | history