execute1: Reduce width of the result mux to help timing
authorPaul Mackerras <paulus@ozlabs.org>
Mon, 15 Jun 2020 06:59:08 +0000 (16:59 +1000)
committerPaul Mackerras <paulus@ozlabs.org>
Mon, 15 Jun 2020 09:08:58 +0000 (19:08 +1000)
commitec2fa61792ca73265159f711157ae3dfa6c623e0
treee119504c6eb604d48f3b6e1feeb29da60455c4d1
parent6687aae4d659e79c429c60ebbc07bfac7686365a
execute1: Reduce width of the result mux to help timing

This reduces the number of different things that are assigned to
the result variable.

- The computations for the popcnt, prty, cmpb and exts instruction
  families are moved into the logical unit.
- The result of mfspr from the slow SPRs is computed in 'spr_val'
  before being assigned to 'result'.
- Writes to LR as a result of a blr or bclr instruction are done
  through the exc_write path to writeback.

This eases timing considerably.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
execute1.vhdl
logical.vhdl