Add "read_verilog -pwires" feature, closes #1106
authorClifford Wolf <clifford@clifford.at>
Wed, 19 Jun 2019 12:38:50 +0000 (14:38 +0200)
committerClifford Wolf <clifford@clifford.at>
Wed, 19 Jun 2019 12:38:50 +0000 (14:38 +0200)
commitec4565009ae69409eb01f1b595f5f59fcc969ce2
treee4fa22a4a4598e86f0fa324741fb6062dca851e8
parent5a1f1caa44fb3f4427813acab61aaecc06bae7ba
Add "read_verilog -pwires" feature, closes #1106

Signed-off-by: Clifford Wolf <clifford@clifford.at>
README.md
frontends/ast/ast.cc
frontends/ast/ast.h
frontends/ast/genrtlil.cc
frontends/verilog/verilog_frontend.cc
frontends/verilog/verilog_parser.y