Case support + register bank generator
authorSebastien Bourdeauducq <sebastien@milkymist.org>
Mon, 5 Dec 2011 16:43:56 +0000 (17:43 +0100)
committerSebastien Bourdeauducq <sebastien@milkymist.org>
Mon, 5 Dec 2011 16:43:56 +0000 (17:43 +0100)
commitec51f09c98676a6b14be3abfdaa43f995a855458
tree974f76dd7d5abd9cebf01cc11715655930d35bda
parent458cfc862325e256706d70eb7ee6f5fa012668a9
Case support + register bank generator
examples/divider_conv.py
examples/simple_gpio.py [new file with mode: 0644]
migen/bank/csrgen.py [new file with mode: 0644]
migen/bank/description.py [new file with mode: 0644]
migen/fhdl/convtools.py
migen/fhdl/structure.py
migen/fhdl/verilog.py