verilog: set src attribute for primitives
authorEddie Hung <eddie@fpgeh.com>
Mon, 4 May 2020 17:22:05 +0000 (10:22 -0700)
committerEddie Hung <eddie@fpgeh.com>
Mon, 4 May 2020 17:22:05 +0000 (10:22 -0700)
commiteca9fc01a78c5cc4c1d8120e2ccdf18211bcef37
tree2f7baee8ade49e326f002d3fd799f95891ff95e0
parentad8e7878f6321b9c35ae41b651a7da9a733ce4be
verilog: set src attribute for primitives
frontends/ast/simplify.cc
frontends/verilog/verilog_parser.y