back.verilog: add workaround for evaluation Verific behavior.
authorTeguh Hofstee <5227572+hofstee@users.noreply.github.com>
Thu, 23 Apr 2020 21:46:10 +0000 (14:46 -0700)
committerGitHub <noreply@github.com>
Thu, 23 Apr 2020 21:46:10 +0000 (21:46 +0000)
commited0f508e8a985184e19c12dc91d8623c3d958c0b
treea12736f6be33da10d9022329c0eca2bd2648bd70
parent875579ea50fdc6d5ae0adc1beff6e6c9df1bdd8b
back.verilog: add workaround for evaluation Verific behavior.

The evaluation version of Verific prints its license information to stdout,
and since it is against the EULA to change that in any way, this behavior
is not possible to fix in Yosys. Add a workaround in nMigen instead.
nmigen/back/verilog.py