intel/compiler: don't compact 3-src instructions with Src1Type or Src2Type bits
authorIago Toral Quiroga <itoral@igalia.com>
Tue, 22 May 2018 08:21:29 +0000 (10:21 +0200)
committerJuan A. Suarez Romero <jasuarez@igalia.com>
Thu, 18 Apr 2019 09:05:18 +0000 (11:05 +0200)
commitee049f6b717ea6e20cef38f16a8024276b181d17
treeadb4634c6f304c96e9324df4ef43e3020e40e258
parent120c970619cd876a256f788afe2a79a92f8cd7ab
intel/compiler: don't compact 3-src instructions with Src1Type or Src2Type bits

We are now using these bits, so don't assert that they are not set. In gen8,
if these bits are set compaction is not possible. On gen9 and CHV platforms
set_3src_control_index() checks these bits (and others) against a table to
validate if the particular bit combination is eligible for compaction or not.

v2
 - Add more detail in the commit message explaining the situation for SKL+
   and CHV (Jason)

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
src/intel/compiler/brw_eu_compact.c