RISC-V: Dump vset[i]vli immediate as numbers once vsew or vlmul is reserved.

RISC-V: Dump vset[i]vli immediate as numbers once vsew or vlmul is reserved.

Consider the following case,

vsetvli  a0, a1,  0x4           # unrecognized vlmul
vsetvli  a0, a1,  0x20          # unrecognized vsew
vsetivli a0, 0xb, 0x4           # unrecognized vlmul
vsetivli a0, 0xb, 0x20          # unrecognized vsew

For the current dis-assembler, we get the result,

0000000000000000 <.text>:
   0:   0045f557                vsetvli a0,a1,e8,(null),tu,mu
   4:   0205f557                vsetvli a0,a1,e128,m1,tu,mu
   8:   c045f557                vsetivli        a0,11,e8,(null),tu,mu
   c:   c205f557                vsetivli        a0,11,e128,m1,tu,mu

The vsew e128 and vlmul (null) are preserved according to the spec,
so dump these fields looks wrong.  Consider that we are used to dump
the unrecognized csr as csr numbers directly, we should also dump
the whole vset[i]vli immediates as numbers, once the vsew or vlmul
is reserved.  Therefore, following is what I expected,

0000000000000000 <.text>:
   0:   0045f557                vsetvli a0,a1,4
   4:   0205f557                vsetvli a0,a1,32
   8:   c045f557                vsetivli        a0,11,4
   c:   c205f557                vsetivli        a0,11,32

gas/
	* testsuite/gas/riscv/vector-insns.d: Rewrite the vset[i]vli
	testcases since we should dump the immediate as numbers once
	the vsew or vlmul is reserved.
	* testsuite/gas/riscv/vector-insns.s: Likewise.
opcodes/
	* riscv-dis.c (print_insn_args): The reserved vsew and vlmul
	are NULL string in the riscv_vsew and riscv_vlmul, so dump the
	whole imm as numbers once one of them is NULL.
	* riscv-opc.c (riscv_vsew): Set the reserved vsew to NULL.
	(riscv_vlmul): Set the reserved vlmul to NULL.