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(parent: 491d3a7) | patch
mem: Add tRRD as a timing parameter for the DRAM controller
authorAndreas Hansson <andreas.hansson@arm.com>
Fri, 1 Nov 2013 15:56:24 +0000 (11:56 -0400)
committerAndreas Hansson <andreas.hansson@arm.com>
Fri, 1 Nov 2013 15:56:24 +0000 (11:56 -0400)
commitee6b41a1e41656b15f9f77bff5effbba27133603
treeae080814212126754b99956b773ef710dbbcd2aftree
parent491d3a77cfe90b21c83304a2d4a5af54c909c916commit | diff
mem: Add tRRD as a timing parameter for the DRAM controller

This patch adds the tRRD parameter to the DRAM controller. With the
recent addition of the actAllowedAt member for each bank, this
addition is trivial.
src/mem/SimpleDRAM.py diff | blob | history
src/mem/simple_dram.cc diff | blob | history
src/mem/simple_dram.hh diff | blob | history