Fix INIT for variable length SRs that have been bumped up one
authorEddie Hung <eddieh@ece.ubc.ca>
Tue, 19 Mar 2019 21:54:43 +0000 (14:54 -0700)
committerEddie Hung <eddieh@ece.ubc.ca>
Tue, 19 Mar 2019 21:54:43 +0000 (14:54 -0700)
commitf239cb821edb86c3ec48782139e982819f073a7c
treebcbe2dfbf46fe9549f80378198b36392a3127ca6
parent24553326dde876b51179e092e608ce8174a44681
Fix INIT for variable length SRs that have been bumped up one
techlibs/xilinx/cells_map.v