[AArch64] PR71307: Define union class of POINTER+FP
authorRichard Sandiford <richard.sandiford@linaro.org>
Mon, 2 Oct 2017 08:11:07 +0000 (08:11 +0000)
committerRichard Sandiford <rsandifo@gcc.gnu.org>
Mon, 2 Oct 2017 08:11:07 +0000 (08:11 +0000)
commitf25a140b6a8a27a1bfb2d2572b4963d098ff91ae
tree82837fb50e3f7cc47707097144b55a86e3241788
parent0389d86c4e252df643f9c3539e5a114add56ec7f
[AArch64] PR71307: Define union class of POINTER+FP

ALL_REGS doesn't function as a union class of POINTER_REGS and FP_REGS
since it includes the CC register as well.  REGNO_REG_CLASS (CC_REGNUM)
is NO_REGS, but of course NO_REGS rightly doesn't include CC_REGNUM.

Adding a union class for POINTER+FP allows the RA to use it as the
preferred or alternative class of a pseudo.  It also works as a
union class of GENERAL+FP for modes that aren't allowed in SP.

This is also needed for the SVE port, which adds predicate registers
to the mix.

2017-09-15  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
PR target/71307
* config/aarch64/aarch64.h (POINTER_AND_FP_REGS): New reg class.
(REG_CLASS_NAMES, REG_CLASS_CONTENTS): Update accordingly.
* config/aarch64/aarch64.c (aarch64_class_max_nregs): Handle
POINTER_AND_FP_REGS.

gcc/testsuite/
PR target/71307
* gcc.target/aarch64/vect_copy_lane_1.c: Remove XFAIL.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r253337
gcc/ChangeLog
gcc/config/aarch64/aarch64.c
gcc/config/aarch64/aarch64.h
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/aarch64/vect_copy_lane_1.c