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(parent: 409e0b2) | patch
i965: Enable emitting Q and UQ instructions in the fs backend
authorIan Romanick <ian.d.romanick@intel.com>
Thu, 1 Sep 2016 19:00:10 +0000 (12:00 -0700)
committerIan Romanick <ian.d.romanick@intel.com>
Fri, 20 Jan 2017 23:41:23 +0000 (15:41 -0800)
commitf2fa5105946a014f1013b288db37d17b2c19930a
tree1c7dd62969109c2d5a552bc5501fae37ed39d461tree
parent409e0b2d48fea4afa9ddfcd171ee33dbd3ace2f1commit | diff
i965: Enable emitting Q and UQ instructions in the fs backend

v2: Fixup assertion in brw_reg_type_to_hw_type to allow
BRW_REGISTER_TYPE_{UQ,Q} on Gen8+.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
src/mesa/drivers/dri/i965/brw_eu_emit.c diff | blob | history
src/mesa/drivers/dri/i965/brw_inst.h diff | blob | history