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(parent: 0dfc215) | patch
fhdl/verilog: initialize internal read-only signals with their reset values
authorSebastien Bourdeauducq <sebastien@milkymist.org>
Sun, 1 Apr 2012 14:39:11 +0000 (16:39 +0200)
committerSebastien Bourdeauducq <sebastien@milkymist.org>
Sun, 1 Apr 2012 14:39:11 +0000 (16:39 +0200)
commitf3ae22f488119aa273882adcd6537bc6b54dc66a
tree4463b2ab755089644a3b4a24c7ef768b4572c3fdtree
parent0dfc215fe83aee3421b5edcc383f7946ceb34083commit | diff
fhdl/verilog: initialize internal read-only signals with their reset values
migen/fhdl/verilog.py diff | blob | history