aarch64: Add LSE128 instructions
authorVictor Do Nascimento <victor.donascimento@arm.com>
Tue, 12 Sep 2023 12:10:14 +0000 (13:10 +0100)
committerVictor Do Nascimento <victor.donascimento@arm.com>
Tue, 7 Nov 2023 21:54:19 +0000 (21:54 +0000)
commitf3f6c0df60c4e8a6c3409db4f23f2cdec5a9d41c
treebefa3e9332d98f77d7168b4b0a11f3a09909e1e1
parentf0d70d8ee63b6f6a59cf4a10268f546b0bc80777
aarch64: Add LSE128 instructions

Implement, together with the necessary tests, the following new LSE128
atomic instructions:

  * Atomic bit clear on quadword in memory (ldclrp{a|l|al});
  * Atomic bit set on quadword in memory (ldsetp{a|l|al});
  * Swap quadword in memory (swpp{a|l|al});

gas/ChangeLog:

* testsuite/gas/aarch64/lse128-atomic.d: New.
* testsuite/gas/aarch64/lse128-atomic.s: Likewise.

opcodes/ChangeLog:

* aarch64-tbl.h (ldclrp): new _LSE128_INSN entry.
(ldclrpa):  Likewise.
(ldclrpal): Likewise.
(ldclrpl): Likewise.
(ldsetp): Likewise.
(ldsetpa): Likewise.
(ldsetpal): Likewise.
(ldsetpl): Likewise.
(swpp): Likewise.
(swppa): Likewise.
(swppal): Likewise.
(swppl): Likewise.
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Likewise.
* aarch64-opc-2.c: Likewise.
gas/NEWS
gas/testsuite/gas/aarch64/lse128-atomic.d [new file with mode: 0644]
gas/testsuite/gas/aarch64/lse128-atomic.s [new file with mode: 0644]
opcodes/aarch64-asm-2.c
opcodes/aarch64-dis-2.c
opcodes/aarch64-opc-2.c
opcodes/aarch64-tbl.h