quicklogic: PolarPro 3 support
authorLofty <dan.ravensloft@gmail.com>
Wed, 17 Mar 2021 02:34:30 +0000 (02:34 +0000)
committerMarcelina Kościelnicka <mwk@0x04.net>
Thu, 18 Mar 2021 12:28:16 +0000 (13:28 +0100)
commitf4298b057ae0939b83283c8c7431097e71a32b62
treeeedd3de21b55af0c2952fd8e730fb165c89fa8a3
parent8740fdf1d799fd8a3196bac28fe4e418e74f2acc
quicklogic: PolarPro 3 support

Co-authored-by: Grzegorz Latosiński <glatosinski@antmicro.com>
Co-authored-by: Maciej Kurc <mkurc@antmicro.com>
Co-authored-by: Tarachand Pagarani <tpagarani@quicklogic.com>
Co-authored-by: Lalit Sharma <lsharma@quicklogic.com>
Co-authored-by: kkumar23 <kkumar@quicklogic.com>
20 files changed:
Makefile
techlibs/quicklogic/Makefile.inc [new file with mode: 0644]
techlibs/quicklogic/cells_sim.v [new file with mode: 0644]
techlibs/quicklogic/lut_sim.v [new file with mode: 0644]
techlibs/quicklogic/pp3_cells_map.v [new file with mode: 0644]
techlibs/quicklogic/pp3_cells_sim.v [new file with mode: 0644]
techlibs/quicklogic/pp3_ffs_map.v [new file with mode: 0644]
techlibs/quicklogic/pp3_latches_map.v [new file with mode: 0644]
techlibs/quicklogic/pp3_lut_map.v [new file with mode: 0644]
techlibs/quicklogic/synth_quicklogic.cc [new file with mode: 0644]
tests/arch/quicklogic/add_sub.ys [new file with mode: 0644]
tests/arch/quicklogic/adffs.ys [new file with mode: 0644]
tests/arch/quicklogic/counter.ys [new file with mode: 0644]
tests/arch/quicklogic/dffs.ys [new file with mode: 0644]
tests/arch/quicklogic/fsm.ys [new file with mode: 0644]
tests/arch/quicklogic/latches.ys [new file with mode: 0644]
tests/arch/quicklogic/logic.ys [new file with mode: 0644]
tests/arch/quicklogic/mux.ys [new file with mode: 0644]
tests/arch/quicklogic/run-test.sh [new file with mode: 0755]
tests/arch/quicklogic/tribuf.ys [new file with mode: 0644]