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(parent: 758dd75) | patch
[AArch64] Update FPSR/FPCR fields for FPU and SVE
authorLuis Machado <luis.machado@arm.com>
Thu, 22 Sep 2022 11:53:33 +0000 (12:53 +0100)
committerLuis Machado <luis.machado@arm.com>
Tue, 4 Oct 2022 08:14:34 +0000 (09:14 +0100)
commitf4b581f2d1ac69c27a06a328e11763b44544aadb
tree34c8a3e9eb8ce18427f7691260b2817fc55602a3tree
parent758dd750bc6d752b290aefdd62048ca2ea5899d4commit | diff
[AArch64] Update FPSR/FPCR fields for FPU and SVE

I noticed some missing flags/fields from FPSR and FPCR registers in
both the FPU and SVE target descriptions.

This patch adds those and makes the SVE versions of FPSR and FPCR
use the proper flags/bitfields types.
gdb/features/aarch64-fpu.c diff | blob | history
gdb/features/aarch64-fpu.xml diff | blob | history
gdb/features/aarch64-sve.c diff | blob | history