arch-arm: Fault when dc ivac is executed from EL0
authorNikos Nikoleris <nikos.nikoleris@arm.com>
Tue, 19 Dec 2017 16:58:33 +0000 (16:58 +0000)
committerNikos Nikoleris <nikos.nikoleris@arm.com>
Wed, 7 Feb 2018 16:14:39 +0000 (16:14 +0000)
commitf4e27c3ff56894e738bd2a975646b5a07d9ea75c
tree7ed54c037502d2b97fb4a6eaaca46be18468f0f2
parentb72d69c5caa382902fc200086e861e92ef883163
arch-arm: Fault when dc ivac is executed from EL0

A previous change enabled execution of dc ivac from EL0 when
SCTLR_EL1.UCI=1. The Arm ARM specifies that dc ivac is the only data
cache maintenance operation by VA that cannot be executed from
EL0. This changeset essential reverts the change:
8d43922 arch-arm: Allow dc ivac from EL0 when SCTLR_EL1.UCI=1

Change-Id: Ia25fab13846a151f548e649a16067feb1ff65c9c
Reviewed-by: Jack Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/7823
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
src/arch/arm/miscregs.cc