back.verilog: add workaround for evaluation Verific behavior.
authorTeguh Hofstee <5227572+hofstee@users.noreply.github.com>
Thu, 23 Apr 2020 21:46:10 +0000 (14:46 -0700)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 31 Dec 2021 13:28:33 +0000 (13:28 +0000)
commitf5fe853a51918b5a81c9c0afb2eb28ff79738692
treea12736f6be33da10d9022329c0eca2bd2648bd70
parentdc1a6bcaf72d1098a9d733fad99f2aa8cc1685fb
back.verilog: add workaround for evaluation Verific behavior.

The evaluation version of Verific prints its license information to stdout,
and since it is against the EULA to change that in any way, this behavior
is not possible to fix in Yosys. Add a workaround in nMigen instead.
nmigen/back/verilog.py