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arch-arm: VSTCR_EL2/VSTTBR_EL2 accessible in secure mode only
authorGiacomo Travaglini <giacomo.travaglini@arm.com>
Tue, 10 Nov 2020 15:16:29 +0000 (15:16 +0000)
committerGiacomo Travaglini <giacomo.travaglini@arm.com>
Wed, 25 Nov 2020 10:51:14 +0000 (10:51 +0000)
commitf79102d67b0e9081badb54e4a84934311a967705
tree47b4fb3026856b0af2015e1ec987bf7d3aae7a96tree
parent7ad2f0e519352b3972a5d25ba457755310de4731commit | diff
arch-arm: VSTCR_EL2/VSTTBR_EL2 accessible in secure mode only

We should trigger an Undefined Instruction if those registers
are accessed in non-secure mode

Change-Id: I45ec01e9e4ae9a38d59e56a51e198b4199a7d814
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/37616
Tested-by: kokoro <noreply+kokoro@google.com>
src/arch/arm/miscregs.cc diff | blob | history