arch-arm: ISA param for treating MISCREG_IMPDEF_UNIMPL as NOP
authorGiacomo Travaglini <giacomo.travaglini@arm.com>
Wed, 9 May 2018 16:52:37 +0000 (17:52 +0100)
committerGiacomo Travaglini <giacomo.travaglini@arm.com>
Tue, 29 May 2018 10:17:47 +0000 (10:17 +0000)
commitf94f70237dfaac86c83dfbb7cb24e6a821b867eb
tree31fd902bb76d6024e1eac46d301de40fb9db6ec9
parent936b584ce35c079db98ab17c6ac9c6943ce7220e
arch-arm: ISA param for treating MISCREG_IMPDEF_UNIMPL as NOP

In the Arm ISA there are some sys reg numbers which are reserved for
implementation defined registers. The default behaviour is to to treat
them as unimplemented registers. It is now possible to change this
behaviour at runtime and treat them as NOP. In this way an access to
those register won't make simulation fail.

Change-Id: I0d108299a6d5aa81fcdabdaef04eafe46df92343
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/10504
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
src/arch/arm/ArmISA.py
src/arch/arm/isa.cc
src/arch/arm/isa.hh
src/arch/arm/isa/formats/aarch64.isa
src/arch/arm/isa/formats/misc.isa
src/arch/arm/miscregs.cc