i965/gen6: Fix GPU hang when using stencil buffer without depth
authorChad Versace <chad.versace@linux.intel.com>
Wed, 23 Nov 2011 18:06:46 +0000 (10:06 -0800)
committerChad Versace <chad.versace@linux.intel.com>
Wed, 23 Nov 2011 19:03:31 +0000 (11:03 -0800)
commitf99d5af03b0f97d7a1b7076b2142069770879471
tree5435a191f74bf03aca89dc455ea727b1d2a188b1
parent8d15268a61fe400668495e6cb42c4d15e8b17cbb
i965/gen6: Fix GPU hang when using stencil buffer without depth

Enable the bit 3DSTATE_DEPTH_BUFFER.Tiled_Surface.  From the Sandybridge
PRM, Volume 2, Part 1, Section 7.5.5.1.1 3DSTATE_DEPTH_BUFFER, Bit 1.27
Tiled Surface:
   [DevGT+]: This field must be set to TRUE.

Fixes GPU hangs on the following Piglit tests:
   hiz-stencil-test-fbo-d0-s8
   hiz-stencil-read-fbo-d0-s8

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
src/mesa/drivers/dri/i965/brw_misc_state.c