hdl.ast: allow sampling ClockSignal, ResetSignal.
authorwhitequark <whitequark@whitequark.org>
Thu, 17 Jan 2019 05:23:06 +0000 (05:23 +0000)
committerwhitequark <whitequark@whitequark.org>
Thu, 17 Jan 2019 05:23:06 +0000 (05:23 +0000)
commitfa8e876356224503700e454df4bde07609244739
treedfdfa0c34d50566bffd6f15aa2f24e328e1e78e7
parent8c96675580dec2849edac3187713d60f20b94780
hdl.ast: allow sampling ClockSignal, ResetSignal.
nmigen/hdl/ast.py
nmigen/hdl/xfrm.py
nmigen/test/test_hdl_ast.py