Keep reserved bits in CPSR on write
authorYao Qi <yao.qi@linaro.org>
Fri, 16 Sep 2016 13:58:31 +0000 (14:58 +0100)
committerYao Qi <yao.qi@linaro.org>
Wed, 21 Sep 2016 11:29:53 +0000 (12:29 +0100)
commitfc6cda2ee85d2c2719db3b5ae3a1ae963f28416b
tree6fffa61c201da1162d729cd919d3fc5608d1d70d
parent44b8317a75390fd3713da6d8cc0f593c041fd8a2
Keep reserved bits in CPSR on write

In patch https://sourceware.org/ml/gdb-patches/2016-04/msg00529.html
I cleared reserved bits when reading CPSR.  It makes a problem that
these bits (zero) are written back to kernel through ptrace, and it
changes the state of the processor on some recent kernel, which is
unexpected.

In this patch, I keep these reserved bits when write CPSR back to
hardware.

gdb:

2016-09-21  Yao Qi  <yao.qi@linaro.org>

* aarch32-linux-nat.c (aarch32_gp_regcache_collect): Keep
bits 20 to 23.

gdb/gdbserver:

2016-09-21  Yao Qi  <yao.qi@linaro.org>

* linux-aarch32-low.c (arm_fill_gregset): Keep bits 20 to
23.
gdb/ChangeLog
gdb/aarch32-linux-nat.c
gdb/gdbserver/ChangeLog
gdb/gdbserver/linux-aarch32-low.c