Make SPARC checkpointing work
authorAli Saidi <saidi@eecs.umich.edu>
Tue, 30 Jan 2007 23:25:39 +0000 (18:25 -0500)
committerAli Saidi <saidi@eecs.umich.edu>
Tue, 30 Jan 2007 23:25:39 +0000 (18:25 -0500)
commitfc79ace5023048e5f73e5c1e21b8f86f09f72bf0
tree3e92ef502c8118f0d21498195ab20ab7459ea0e8
parent3fa5816dcf639b3cf2e134f94d80e13813d3dfd8
Make SPARC checkpointing work

src/arch/sparc/floatregfile.cc:
    Fix serialization for fpreg
src/arch/sparc/intregfile.cc:
    fix serialization for intreg
src/arch/sparc/miscregfile.cc:
    fix serialization from miscreg
src/arch/sparc/pagetable.cc:
    fix serialization for page table
src/arch/sparc/regfile.cc:
    need to serialize nnpc
src/arch/sparc/tlb.cc:
    write serialization code for tlb
src/cpu/base.cc:
    provide a way to find the thread number a context is
    serialize the instruction counter
src/cpu/base.hh:
    provide a way to find the thread number a context is
    and given a thread number find a context pointer
src/cpu/cpuevent.hh:
    provide method to get thread context from a cpu event for serialization
src/dev/sparc/t1000.cc:
src/dev/sparc/t1000.hh:
    nothing to serialize in t1000
src/sim/serialize.cc:
src/sim/serialize.hh:
    Make findObj() work (it hasn't since we did the python conversion stuff)

--HG--
extra : convert_revision : a95bc4e3c3354304171efbe3797556fdb146bea2
13 files changed:
src/arch/sparc/floatregfile.cc
src/arch/sparc/intregfile.cc
src/arch/sparc/miscregfile.cc
src/arch/sparc/pagetable.cc
src/arch/sparc/regfile.cc
src/arch/sparc/tlb.cc
src/cpu/base.cc
src/cpu/base.hh
src/cpu/cpuevent.hh
src/dev/sparc/t1000.cc
src/dev/sparc/t1000.hh
src/sim/serialize.cc
src/sim/serialize.hh