[binutils][aarch64] New sve_size_tsz_bhs iclass.
Add sve_size_tsz_bhs iclass needed for sqxtnb and similar instructions.
This iclass encodes one of three variants by the most significant bit
set in a 3-bit value where only one bit may be set.
include/ChangeLog:
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
* opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_tsz_bhs
iclass.
opcodes/ChangeLog:
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
* aarch64-asm.c (aarch64_encode_variant_using_iclass): Handle
sve_size_tsz_bhs iclass encode.
* aarch64-dis.c (aarch64_decode_variant_using_iclass): Handle
sve_size_tsz_bhs iclass decode.