[binutils][aarch64] New sve_size_tsz_bhs iclass.
authorMatthew Malcomson <matthew.malcomson@arm.com>
Thu, 9 May 2019 09:29:26 +0000 (10:29 +0100)
committerMatthew Malcomson <matthew.malcomson@arm.com>
Thu, 9 May 2019 09:29:26 +0000 (10:29 +0100)
commitfd1dc4a0c1b87c1efa7e0398fd47fd1e87fa0fb4
tree9f6e78bfe276c4fa1ebf89e523aab0df8217c7d1
parent31e36ab341498bb477a46a0475100ec5d471c4f2
[binutils][aarch64] New sve_size_tsz_bhs iclass.

Add sve_size_tsz_bhs iclass needed for sqxtnb and similar instructions.
This iclass encodes one of three variants by the most significant bit
set in a 3-bit value where only one bit may be set.

include/ChangeLog:

2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>

* opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_tsz_bhs
iclass.

opcodes/ChangeLog:

2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>

* aarch64-asm.c (aarch64_encode_variant_using_iclass): Handle
sve_size_tsz_bhs iclass encode.
* aarch64-dis.c (aarch64_decode_variant_using_iclass): Handle
sve_size_tsz_bhs iclass decode.
include/ChangeLog
include/opcode/aarch64.h
opcodes/ChangeLog
opcodes/aarch64-asm.c
opcodes/aarch64-dis.c