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(parent: f1f1391) | patch
[AArch64 2/3] Add SIMD-reg variants of logical operators and/ior/xor/not
authorAlan Lawrence <alan.lawrence@arm.com>
Fri, 19 Dec 2014 17:48:15 +0000 (17:48 +0000)
committerAlan Lawrence <alalaw01@gcc.gnu.org>
Fri, 19 Dec 2014 17:48:15 +0000 (17:48 +0000)
commitfe82d1f27edc59a5c5cdb705235bd341cab2dbb9
tree8d7747ebe7777be2fb70a60a341a6863a4ff06a5tree
parentf1f1391ce029d83261560db18bd9c1f442221c5ecommit | diff
[AArch64 2/3] Add SIMD-reg variants of logical operators and/ior/xor/not

* config/aarch64/aarch64.md (<optab><mode>3, one_cmpl<mode>2):
Add SIMD-register variant.
* config/aarch64/iterators.md (Vbtype): Add value for SI.

From-SVN: r218960
gcc/ChangeLog diff | blob | history
gcc/config/aarch64/aarch64.md diff | blob | history
gcc/config/aarch64/iterators.md diff | blob | history