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(parent: b15f056) | patch
vendor.xilinx_7series: byte swap generated bitstream
authorNorbert Braun <norbert@xrpbot.org>
Mon, 2 Nov 2020 21:00:17 +0000 (22:00 +0100)
committerwhitequark <whitequark@whitequark.org>
Tue, 3 Nov 2020 09:39:49 +0000 (09:39 +0000)
commit14a5c42a8bd425a4882ba566b26e11bd6d1e1721
tree63dba3f1f4574ed3a1ff355be1005910bb656485tree
parentb15f0562a62ebbd48b87f2d662cd01845c857c62commit | diff
vendor.xilinx_7series: byte swap generated bitstream

The Zynq driver in the FPGA Manager framework on Linux expects bitstreams that
are byte swapped with respect to what the Vivado command
`write_bitstream -bin_file` produces. Thus, use the `write_cfgmem` command with
appropriate options to generate the bitstream (.bin file).

Fixes #519.
nmigen/vendor/xilinx_7series.py diff | blob | history