+/**
+ * Move a block registers from src to dst (or move a single register).
+ * \param size size of block, in floats (<=4 means one register)
+ */
+static struct prog_instruction *
+move_block(slang_emit_info *emitInfo,
+ GLuint size, GLboolean relAddr,
+ const slang_ir_storage *dst,
+ const slang_ir_storage *src)
+{
+ struct prog_instruction *inst;
+
+ if (size > 4) {
+ /* move matrix/struct etc (block of registers) */
+ slang_ir_storage dstStore = *dst;
+ slang_ir_storage srcStore = *src;
+ //GLint size = srcStore.Size;
+ /*ASSERT(n->Children[0]->Writemask == WRITEMASK_XYZW);
+ ASSERT(n->Children[1]->Store->Swizzle == SWIZZLE_NOOP);
+ */
+ dstStore.Size = 4;
+ srcStore.Size = 4;
+ while (size >= 4) {
+ inst = new_instruction(emitInfo, OPCODE_MOV);
+ inst->Comment = _mesa_strdup("IR_COPY block");
+ storage_to_dst_reg(&inst->DstReg, &dstStore, WRITEMASK_XYZW);
+ storage_to_src_reg(&inst->SrcReg[0], &srcStore);
+ inst->SrcReg[0].RelAddr = relAddr;
+ srcStore.Index++;
+ dstStore.Index++;
+ size -= 4;
+ }
+ }
+ else {
+ /* single register move */
+ GLuint writemask;
+ if (size == 1) {
+ GLuint comp = GET_SWZ(src->Swizzle, 0);
+ assert(comp < 4);
+ writemask = WRITEMASK_X << comp;
+ }
+ else {
+ writemask = WRITEMASK_XYZW;
+ }
+ inst = new_instruction(emitInfo, OPCODE_MOV);
+ storage_to_dst_reg(&inst->DstReg, dst, writemask);
+ storage_to_src_reg(&inst->SrcReg[0], src);
+ inst->SrcReg[0].RelAddr = relAddr;
+ }
+ return inst;
+}
+
+
+