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techmap: use C++11 default member initializers. NFC.
author
whitequark
<whitequark@whitequark.org>
Tue, 2 Jun 2020 23:17:46 +0000
(23:17 +0000)
committer
whitequark
<whitequark@whitequark.org>
Tue, 2 Jun 2020 23:43:20 +0000
(23:43 +0000)
passes/techmap/techmap.cc
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diff --git
a/passes/techmap/techmap.cc
b/passes/techmap/techmap.cc
index 0d7c10d0c86de67f8cefbb6521b8bb1573802d7b..9227385b37a18f87bce20d3a3c7d70b6f87fa4a5 100644
(file)
--- a/
passes/techmap/techmap.cc
+++ b/
passes/techmap/techmap.cc
@@
-80,22
+80,12
@@
struct TechmapWorker
typedef dict<IdString, std::vector<TechmapWireData>> TechmapWires;
typedef dict<IdString, std::vector<TechmapWireData>> TechmapWires;
- bool extern_mode;
- bool assert_mode;
- bool flatten_mode;
- bool recursive_mode;
- bool autoproc_mode;
- bool ignore_wb;
-
- TechmapWorker()
- {
- extern_mode = false;
- assert_mode = false;
- flatten_mode = false;
- recursive_mode = false;
- autoproc_mode = false;
- ignore_wb = false;
- }
+ bool extern_mode = false;
+ bool assert_mode = false;
+ bool flatten_mode = false;
+ bool recursive_mode = false;
+ bool autoproc_mode = false;
+ bool ignore_wb = false;
std::string constmap_tpl_name(SigMap &sigmap, RTLIL::Module *tpl, RTLIL::Cell *cell, bool verbose)
{
std::string constmap_tpl_name(SigMap &sigmap, RTLIL::Module *tpl, RTLIL::Cell *cell, bool verbose)
{