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author
lkcl
<lkcl@web>
Fri, 24 Nov 2023 21:40:53 +0000
(21:40 +0000)
committer
IkiWiki
<ikiwiki.info>
Fri, 24 Nov 2023 21:40:53 +0000
(21:40 +0000)
meetings/dmitry_2023-11-24.mdwn
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diff --git
a/meetings/dmitry_2023-11-24.mdwn
b/meetings/dmitry_2023-11-24.mdwn
index 97e72d4241f53ada2475f2bed5275afc60a3c78d..5356ef97c27bb42568344b5925af79c5f23ee0f7 100644
(file)
--- a/
meetings/dmitry_2023-11-24.mdwn
+++ b/
meetings/dmitry_2023-11-24.mdwn
@@
-25,19
+25,20
@@
full feature set of SimpleV. Link to LibreSOC'
## New Binutils Grant
## New Binutils Grant
-- [[nlnet_2023_s
vp64
_riscv_binutils]]
+- [[nlnet_2023_s
implev
_riscv_binutils]]
- Primarily Dmitry doing most of the work.
## Primary Tasks
1. Finish writing libopid, some of the work started 4 months ago
- Primarily Dmitry doing most of the work.
## Primary Tasks
1. Finish writing libopid, some of the work started 4 months ago
-(no RfPs
will
be submitted for that work). Link to
+(no RfPs
can
be submitted for that work). Link to
[repo](https://git.libre-soc.org/?p=mdis.git;a=summary)
[repo](https://git.libre-soc.org/?p=mdis.git;a=summary)
- 2. Convert existing PowerISA (SFFS) `isndb` instruction database to libopid.
+ 2. Convert existing PowerISA (SFFS) `isndb` instruction database to libopid
+ (without losing CSV files which are machine-readable by other projects)
3. Create RISC-V instruction database using libopid.
4. Implement SVP64 PowerISA in libopid.
3. Create RISC-V instruction database using libopid.
4. Implement SVP64 PowerISA in libopid.
- 5. Implement SV for RISC-V in libopid.
+ 5. Implement S
imple
V for RISC-V in libopid.
- SVP32 (16+16) - 16-bit prefix for 16-bit compressed instructions.
- SVP48 (16+32) - 16-bit prefix for 32-bit instructions.
- SVP64 (32+32) - 32-bit prefix for 64-bit instructions.
- SVP32 (16+16) - 16-bit prefix for 16-bit compressed instructions.
- SVP48 (16+32) - 16-bit prefix for 32-bit instructions.
- SVP64 (32+32) - 32-bit prefix for 64-bit instructions.